Hand-in-hand verification of high-level synthesis

Research output: Contribution to conference › Paper › peer-review

Original language	English
DOIs	https://doi.org/10.1145/1228784.1228885
Publication status	Published - Mar 2007
Externally published	Yes
Event	17th Great Lakes Symposium on VLSI - Stresa-Lago Maggiore, Italy Duration: 11 Mar 2007 → 13 Mar 2007

Conference	17th Great Lakes Symposium on VLSI
Period	11/03/07 → 13/03/07

Keywords

@conference{a2f7a42f14a845e5a927f8fcf1fbd431,

title = "Hand-in-hand verification of high-level synthesis",

keywords = "Formal methods, Computer science and informatics",

author = "Dipankar Sarkar and Chittaranjan Mandal and Chris Reade and Chandan Karfa",

year = "2007",

month = mar,

doi = "10.1145/1228784.1228885",

language = "English",

note = "17th Great Lakes Symposium on VLSI ; Conference date: 11-03-2007 Through 13-03-2007",

}

TY - CONF

T1 - Hand-in-hand verification of high-level synthesis

AU - Sarkar, Dipankar

AU - Mandal, Chittaranjan

AU - Reade, Chris

AU - Karfa, Chandan

PY - 2007/3

Y1 - 2007/3

KW - Formal methods

KW - Computer science and informatics

U2 - 10.1145/1228784.1228885

DO - 10.1145/1228784.1228885

M3 - Paper

T2 - 17th Great Lakes Symposium on VLSI

Y2 - 11 March 2007 through 13 March 2007

ER -